Resilient Packet Ring (RPR) network is a new Metropolitan Area Network (MAN). FIG. 1 is a schematic diagram illustrating structure of the RPR network. As shown in FIG. 1, the RPR network is a kind of network with dual-ring structure, and it can at most support a connection of 255 nodes, which are numbered sequentially from node S0 to node S254. An outer ringlet of RPR network is called ringlet 0, while an inner ringlet is called ringlet 1. The portion bounded by two nodes is called span, each connection between two nodes is called link, and S254 congestion caused by total data flow from node S0 to node S254 is called congestion domain.
FIG. 2 is a schematic diagram illustrating a layer model of RPR network. As shown in FIG. 2, the RPR mainly concerns about communications of a MAC control sublayer and a MAC datapath sublayer within a data link layer with a MAC client of upper layer inside a reference model of Open System Interconnect (OSI). Generally, the MAC control sublayer and the MAC datapath sublayer within the data link layer are called RPR MAC for short, and the MAC client is called RPR Client.
Applications of various classes, such as ClassA, ClassB and ClassC, are supported by RPR services, and flow control may be carried out by communication systems for the RPR services sending from an RPR Client to an RPR MAC according to their priorities. The specific procedure is: when the RPR Client requires to transmit a data frame ranked ClassA, an indication signal sendA which indicates permission of sending the data frame ranked ClassA is conveyed to the RPR Client if the transmission is agreed by the RPR MAC, then the RPR Client will transmit the data frame ranked ClassA to the RPR MAC after receiving this indication signal. Similarly, when the RPR Client requires to transmit a data frame ranked ClassB or Class C, the interface of RPR Client will not transmit the data frame until receiving a corresponding indication signal sendB or sendC.
The above-mentioned sendA/B/C signals are control signals of RPR MAC, where the sendA signal is a 1-bit signal merely representing whether it is allowed to send a data frame ranked ClassA; the sendB signal is a 1-bit signal merely indicating whether a data frame ranked ClassB is allowed to be sent; the sendC signal is an 8-bit bus signal for denoting the hop count indication from the present node to a congested node in the RPR network. The interface of RPR Client, according to the hop count indication of sendC, will stop transmitting any data frames to nodes far from the congested node, and continue to transmit data frames to nodes near the congested node, so as to make full use of effective bandwidth of the RPR network.
In practical communication systems, functions of RPR Clients and RPR MACs are realized by different physical entities. For instance, an RPR Client is usually carried out by a network processor, which only provides standard interfaces, such as Synchronous Optical Network (SONET) Packet over SONET (POS) interfaces, System Packet Interfaces (SPI), Gigabit Medium Independent Interfaces (GMII) and so on; an RPR MAC is usually implemented by a Field Programmable Gate Array (FPGA) or an Application Specific Integrated Circuit (ASIC), and the sendA/B/C signals are especially for RPR MACs. At the RPR MAC side, 1 signal line is used to transmit sendA, 1 to transmit sendB and 8 to transmit sendC, so 10 signal lines in all are needed to transmit the sendA/B/C signals.
However, standard interfaces on the RPR Client side are not specially designed for RPR and unable to directly process the sendA, sendB and sendC signals sent from the RPR MAC. For instance, in a SPI3 standard interface, a Polling Transmit Packet Availability (PTPA) signal line is of similar function to the sendA/B/C signals, but there is only one PTPA signal line in the SPI3 standard interface whereas there are 10 signal lines for the sendA/B/C signals. Obviously, it is impossible to transmit the sendA/B/C signals to the RPR Client through the PTPA signal line in the SPI3 standard interface.
In order to transmit control signals between the RPR Client and the RPR MAC, an FPGA circuit is added into a standard interface of RPR Client in an existing scheme. With reference to FIG. 3, a gate array is modified within the FPGA according to status of control signal lines of both RPR Client and RPR MAC, so that the control signal of RPR MAC can be converted into a signal available to the standard interface of RPR Client. For instance, when the standard interface of RPR Client is SPI3, a number of paths are set inside the FPGA, where two of the paths are respectively connected to sendA and sendB signal lines of RPR MAC to receive these sendA and sendB signals, and toggle states of sendA and sendB signals are expressed by values of binary states. The other 256 paths are connected to sendC signal line through an internal array of FPGA, and respectively denote the 256 toggle values of sendC signal. The FPGA paths are corresponding to data queues of different priorities of RPR Client. The RPR Client obtains the sendA/B/C signals by means of enquiry manner of standard interface, that is, when a certain queue is to be transmitted, a enquiry request carrying a path number will be sent to the FPGA to inquire whether the queue corresponding to the path can be transmitted, then the FPGA will send out toggle state of the signal in this path according to the path number sent by the RPR Client. In this way, the conversion from 10 signals to 1 signal is completed, so that the sendA, sendB and sendC signals can be transmitted to the RPR Client through the FPGA.
However, in the above-described scheme, an FPGA chip is required in the standard interface to realize transmission of control signals of RPR MAC between the RPR MAC and the RPR Client, which may add to hardware cost of entire communication system and raise unstable factors that may affect signal transmission.